Physical Design/Implementation Engineer
Company Description
Very exciting and fast growing
start- up company currently in stealth mode, developing interesting SoCs &
platforms & working on the latest technology edge, in a close collaboration
with various partners and customers. Company is well funded and has solid
financial backing from large corporate, strategic and financial investors.
Founded by an experienced team with many industry notables involved in various
capacities.
Job Description
Looking
for experienced Physical Design implementation (RTL-GDSII) Engineers to lead
back-end effort on complex high performance/low power SoCs.
Requirements
* Hands
on experience with various implementation types – Megablock, Datapath,
Control and Arrays
* Familiarity with advanced low power (leakage & dynamic) reduction techniques
* Experience with Synthesis and APR on small to large mega blocks
* Multiple tape outs on advanced CMOS nodes with direct RTL to GDSII
* Familiarity with advanced low power (leakage & dynamic) reduction techniques
* Experience with Synthesis and APR on small to large mega blocks
* Multiple tape outs on advanced CMOS nodes with direct RTL to GDSII
Implementation experience
* Familiarity with various industry standard EDA tools
* Design/project management skills and ability to lead/mentor junior Engineers
* Experience with chip area/power/freq estimates based on insufficient data
* Ability to complete timing, power and reliability closure for various functional blocks
* Familiarity with various industry standard EDA tools
* Design/project management skills and ability to lead/mentor junior Engineers
* Experience with chip area/power/freq estimates based on insufficient data
* Ability to complete timing, power and reliability closure for various functional blocks
Send resume in confidence to themadrecruiter@gmail.com
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