We are seeking an experienced hardware-oriented (i.e. Verilog, System Verilog) ASIC verification engineer to collaboratively work with our design team and help execute our verification plans.
Key Competencies:
Languages: Verilog, System Verilog, Perl or C
Extensive experience writing and debugging self-checking testbenches for extremely large (>5M+ gates) chip designs
Chip-level verification experience
Experience with Assertions and Code Coverage
Experience with signal-processing chips, and/or SoC, (wireless or video experience a plus)
No comments:
Post a Comment