Showing posts with label RTL. Show all posts
Showing posts with label RTL. Show all posts

Wednesday, April 4, 2012

Verification Engineer/Mixed Signal Design Engineer

Verification Engineer/ Mixed Signal Design Engineer

Job Description

Nashua, NH

Function:
You will start in the Nashua development team as a Mixed Signal Design Engineer coached by the System Architect. You will design and/or verify Digital logic to be implemented in imager and image processing products as well as contribute to the top level chip verification.

Accountabilities:
Defines, together with the Business Unit and the System Architect, the optimal digital concepts and specifications for the project, as well as the interface between the digital and analog part of the IC.
Design and implement digital logic and circuits including digital image processing blocks, state machines, and microcontrollers.
Cross-verify digital blocks and systems developed by other M/S Design or by the Digital Competence Center to ensure the quality of the blocks.
Develop and implement system level simulations to ensure the correct operation of both the analog and digital portions of the device.
Work with the analog designers to create digital models of the analog blocks to ensure correct interaction between the analog and digital portions of the design.
Participate in design reviews, evaluation and characterization of prototype units in order to contribute to the early identification of deviations/problems and to propose solutions for them.
Collaborate with the Test Engineer to ensure that the design can be efficiently and fully tested. Provide the Test Engineer with all relevant documentation in order to allow him to release the product in time within specification to the production site.
Contribute to the digital simulation and to the top simulation process to ensure that the product has been developed according to the specification predefined with the Business Unit.
Continuously evaluate design processes to propose improvements in terms of efficiency.
Exchange knowledge across the sites and maximize the standardization of the process and technologies in order to reduce the time-to-market and the product quality.
Take the complete ownership of the digital design and analog/digital interface activities of a project.
Technical Competencies:
Top Level Design: Knowledge of modeling skills principles in order to develop an initial model (block diagram, state flow diagrams, behavioral level HDL code, etc) that forms a foundation for prototyping complex projects. Knowledge of the specific methods used to do this (e.g. Simulink, Visio, Verilog). Able to set up the global digital block specifications and define the interface to analog.
Top Level Simulation: Able to simulate mix-mode design and to perform the final top simulation of a complex project (digital and analog parts), with focus on the digital part. Knowledge of the specific tools and processes to efficiently perform simulations (e.g. Verilog-AMS, SimVision).
Design Implementation: In-depth knowledge of design concepts in order to have the overall database (schematics and HDL code) set up, according to the block and products specifications, complying with standard design-methodology rules in order to maximize design reusability. Knows the specific methods used to implement that database in technical terms (CAD tools). In-depth knowledge of the simulation tools to guarantee an efficient design process and a product according to the specification requirements.
Cross Simulation: Able to develop test benches and to conduct simulation on a block developed by another designer. Take the appropriate decision and propose technical solution if needed
Documentation: Able to document the overall database, simulations, design decisions and characterization results in a thorough way according to design standards.
Test: Contribute to test concept during the design phase in order to guarantee a cost effective test program (test time) with the appropriate test coverage. Make sure that the test group receives the necessary information on time in order to work efficiently.
Product Characterization (ISIR): Able to contribute to the characterization plan. Able to conduct analysis in order to validate the design of the produ


Job Requirements

Requirements: - Bachelor or Masters degree in Electrical or Computer Engineering, 3-5 years of experience in the development of digital and mixed signal semiconductor products.
- Fluency in English is a must. Knowledge of any major European / Asian language is a strong asset
- Working experience in integrating different cultural backgrounds
- Working experience in International Industry is a strong asset
- Working experience in Automotive Industry is a strong asset
- Low Travel Intensity
- Working experience with virtual teams is a strong asset
- Successful track record for design of automotive projects

Wednesday, October 15, 2008

New Digital ASIC positions in MA!!

I have several brand new Digital ASIC roles with a client in MA. This is a solid, public company with a great reputation! Below are the detailed descriptions, please feel free to forward your resume directly to me at ross@hightechnh.com

Location: Westford, MA

Summary

The Westford office seeks an experienced (BS +10, MS +8 years) Networking Architect (System/ASIC) to work on the next generation of high speed networking products. Experience with networking related designs and specific experience with QOS, queuing, and scheduling is required.

Responsibilities

Responsibilities include system architecture, ASIC definition, micro-architecture, and project leadership. This position will require a modest amount of travel to Sunnyvale to interact and collaborate with other corporate architects. Additional responsibilities include Verilog RTL coding and synthesis, working closely with Design and Verification engineers to ensure design quality and involvement with PD engineers to ensure solid implementation and timing closure.

Will be a primary member of a team responsible for executing project deliverables and processes necessary to successfully specify, develop, and release to production highly integrated ASICs.

Primary interfaces include architecture, marketing, design, verification, product & test engineering, and other hardware and software development groups. Must have previous experience in organizations with custom / semi-custom CMOS ASIC designs. Experience required in RTL coding, verification, gate level simulation, and associated tools. Experience in physical design (place and route, static timing analysis, package selection and design for test) is a plus.



Job Requirements

Qualifications

We are looking for a positive, energetic candidate who would welcome the challenge of working for a leading edge, growing company. The position will involve close, consultative working relationships with engineers from other teams. An outgoing personality and a collaborative spirit is required.

Required skills include:

  • Design Experience

System and ASIC architecture for networking products
Knowledge of ASIC development tools, physical design tools, and
programming languages, QOS, packet queuing, and scheduling experience


Other desirable skills

SystemC, Vera, or equivalent
C/C++
Scripting with Perl and/or TCL
Large ASIC floorplanning and timing closure
Exceptional written & verbal communication skills

The Silicon Development group develops high-speed, multi-million gate ASICs for routers, firewalls, and other networking products. To deliver on-time and error-free, high performing, scalable, lowest cost, power efficient SILICON that is widely-deployable and beats the competition.

Location: Westford, MA

Summary

The Westford office seeks an experienced (BS +6, MS +4 years) ASIC design engineer on the next generation of high speed networking products. Experience with networking related designs is preferred.

The engineer in this position will be responsible for designing and verifying sections within our multi-million+ gate next-generation SOCs. These high performance designs will be part of the next generation of high performance network infrastructure systems.

Responsibilities

Responsibilities include Verilog RTL coding and synthesis, working closely with other design and verification engineers to ensure design quality and with PD engineers to ensure routable implementation and timing closure.

Candidate will be part of a team responsible for executing project deliverables and processes necessary to successfully specify, develop, and release to production highly integrated ASICs.

Primary interfaces include architecture, design, verification, product & test engineering, and other hardware and software development groups. Must have previous experience in organizations with custom / semi-custom CMOS ASIC designs. Experience required in RTL coding, formal verification, gate level simulation, debug and associated tasks. Experience in physical design (place and route, static timing analysis, package selection and design for test) is a plus.

Additional responsibilities
RTL development from concept to production
Participate in review of design implementation for optimal design tradeoffs and
coding styles
Ensure completed assignments meet project deadlines and departmental and
corporate goals
Participate in methodology improvement

Requirements
Qualifications

We are looking for positive, energetic candidates who would welcome the challenge of working for a leading edge, growing company. The position will involve close, consultative working relationships with engineers from other teams. An outgoing personality and a collaborative spirit is required.

Required skills include
Bachelor's degree in Electrical Engineering or a related field
Knowledge of ASIC development tools, physical design tools, and
programming languages
Verilog, Synopsys
Ability to speak, listen and write effectively
Ability to work well with others, across geographical boundaries

Other desirable skills
SystemC, or equivalent
C/C++
Scripting with Perl and/or TCL
Large ASIC floor-planning and timing closure

Location: Westford, MA


Summary


The Westford office seeks an experienced (BS +6, MS +4 years) ASIC design verification engineer on the next generation of high speed networking products. Experience with networking related designs is preferred.

The engineer in this position will be responsible for verifying sections within our multi-million+ gate next-generation SOCs. These high performance designs will be part of the next generation of high performance network infrastructure systems.

Responsibilities

Responsibilities include writing test plans, building verification test benches, and writing / executing / debugging tests and working closely with system architects and design engineers to ensure design quality.

Candidate will be part of a team responsible for executing project deliverables and processes necessary to successfully specify, develop, and release to production highly integrated ASICs.

Primary interfaces include architecture, design, verification, product & test engineering, and other hardware and software development groups. Must have previous experience in organizations with custom / semi-custom CMOS ASIC designs. Experience required in RTL coding, verification, gate level simulation, and associated tools. Experience in physical design (place and route, static timing analysis, package selection and design for test) is a plus.

Additional responsibilities
Responsible for design verification from concept to production
Develop detailed and comprehensive test plans
Develop verification infrastructure
Timely execution of test plans
Participate in review of design verification coding and coverage metrics
Ensure completed assignments meet project deadlines and departmental and corporate goals
Participate in methodology improvements
Requirements
We are looking for positive, energetic candidates who would welcome the challenge of working for a leading edge, growing company. The position will involve close, consultative working relationships with engineers from other teams. An outgoing personality and a collaborative spirit is required.

Required skills include
Bachelor's degree in Electrical Engineering or a related field
Knowledge of ASIC verification tools, scripting and programming languages
Must be fluent in Verilog, C, and C++
SystemC knowledge is a plus
Ability to speak, listen and write effectively
Ability to work well with others, across geographical boundaries

Any interested parties, please forward your resume to me directly at ross@hightechnh.com