Showing posts with label ASIC. Show all posts
Showing posts with label ASIC. Show all posts

Tuesday, May 8, 2012

DDR3 Memory Circuit Designer in Austin, TX

     

Memory Designer for DDR Interface and Control Block                                            Circuitry


Scope of Responsibility/Expectations
     Work closely with other members of a small, focused, team with responsibility for designing both the pads and the control circuitry associated with a DDR interface.
     Design at the transistor level circuitry in the control block sitting between the DDR pads and the standard memory signals going to and from the array. This control block decodes the instructions from the bus, lines up input and output signals with the high frequency clock using DLLs or PLLs, and converts input signals to array commands and takes array output signals, such as, data, and sends them to the pads following the DDR standard protocol.
     Work under the supervision of a senior project leader. Design, simulate, and supervise layout of blocks of circuitry. Work with product and test engineers evaluating and debugging circuit performance after silicon processing.
Specific Required Knowledge
• Circuit theory
• PLL/DLL design techniques
• Probability and statistics
• Logic design
• Impact of layout parasitic capacitance and resistance on signal integrity, speed, and power dissipation, along with layout techniques to minimize these effects

Useful Skills
• Transistor level simulation
• Parasitic extraction
• Critical path modeling
• Physical design, i. e., layout
• Logic verification
• Mixed-mode Verilog
Education and Experience
Masters or equivalent in Electrical Engineering, Physics, Computer Science, or related fields. A track record of placing memory chips into production is required. Experience designing DDR pads that meet JEDEC electrical specifications and that have industry standard ESD tolerance is desired. Experience with DRAMs or with DRAM Controller s and PHYs is applicable. Demonstration of innovation and leading-edge expertise through publications and patents is desired.

Wednesday, April 4, 2012

Verification Engineer/Mixed Signal Design Engineer

Verification Engineer/ Mixed Signal Design Engineer

Job Description

Nashua, NH

Function:
You will start in the Nashua development team as a Mixed Signal Design Engineer coached by the System Architect. You will design and/or verify Digital logic to be implemented in imager and image processing products as well as contribute to the top level chip verification.

Accountabilities:
Defines, together with the Business Unit and the System Architect, the optimal digital concepts and specifications for the project, as well as the interface between the digital and analog part of the IC.
Design and implement digital logic and circuits including digital image processing blocks, state machines, and microcontrollers.
Cross-verify digital blocks and systems developed by other M/S Design or by the Digital Competence Center to ensure the quality of the blocks.
Develop and implement system level simulations to ensure the correct operation of both the analog and digital portions of the device.
Work with the analog designers to create digital models of the analog blocks to ensure correct interaction between the analog and digital portions of the design.
Participate in design reviews, evaluation and characterization of prototype units in order to contribute to the early identification of deviations/problems and to propose solutions for them.
Collaborate with the Test Engineer to ensure that the design can be efficiently and fully tested. Provide the Test Engineer with all relevant documentation in order to allow him to release the product in time within specification to the production site.
Contribute to the digital simulation and to the top simulation process to ensure that the product has been developed according to the specification predefined with the Business Unit.
Continuously evaluate design processes to propose improvements in terms of efficiency.
Exchange knowledge across the sites and maximize the standardization of the process and technologies in order to reduce the time-to-market and the product quality.
Take the complete ownership of the digital design and analog/digital interface activities of a project.
Technical Competencies:
Top Level Design: Knowledge of modeling skills principles in order to develop an initial model (block diagram, state flow diagrams, behavioral level HDL code, etc) that forms a foundation for prototyping complex projects. Knowledge of the specific methods used to do this (e.g. Simulink, Visio, Verilog). Able to set up the global digital block specifications and define the interface to analog.
Top Level Simulation: Able to simulate mix-mode design and to perform the final top simulation of a complex project (digital and analog parts), with focus on the digital part. Knowledge of the specific tools and processes to efficiently perform simulations (e.g. Verilog-AMS, SimVision).
Design Implementation: In-depth knowledge of design concepts in order to have the overall database (schematics and HDL code) set up, according to the block and products specifications, complying with standard design-methodology rules in order to maximize design reusability. Knows the specific methods used to implement that database in technical terms (CAD tools). In-depth knowledge of the simulation tools to guarantee an efficient design process and a product according to the specification requirements.
Cross Simulation: Able to develop test benches and to conduct simulation on a block developed by another designer. Take the appropriate decision and propose technical solution if needed
Documentation: Able to document the overall database, simulations, design decisions and characterization results in a thorough way according to design standards.
Test: Contribute to test concept during the design phase in order to guarantee a cost effective test program (test time) with the appropriate test coverage. Make sure that the test group receives the necessary information on time in order to work efficiently.
Product Characterization (ISIR): Able to contribute to the characterization plan. Able to conduct analysis in order to validate the design of the produ


Job Requirements

Requirements: - Bachelor or Masters degree in Electrical or Computer Engineering, 3-5 years of experience in the development of digital and mixed signal semiconductor products.
- Fluency in English is a must. Knowledge of any major European / Asian language is a strong asset
- Working experience in integrating different cultural backgrounds
- Working experience in International Industry is a strong asset
- Working experience in Automotive Industry is a strong asset
- Low Travel Intensity
- Working experience with virtual teams is a strong asset
- Successful track record for design of automotive projects

Tuesday, December 22, 2009

Infineon returns to profit in Q4

MUNICH, Germany — Being one of the last chip manufacturers to present its quarterly figures, Infineon reports a profit and a significant sales increase in the fourth quarter.
On sales of €855 million (about $1.282 billion) the company achieved an income from continuing operations of €24 million, a significant improvement over the €26 million loss in the preceding quarter. The sales figure illustrates the situation of the company and in a certain way of the entire semiconductor industry: With an increase of 12 percent it improved significantly over the preceding quarter, but the comparison with the same quarter a year earlier still shows a hefty 18 percent decline. However, the sale of its wireline business has reduced the revenue basis for the company.

Infineon CEO Peter Bauer attributes the improvement to two factors: The cost-cutting program the company has implemented over the past 12 months and an increased demand in all segments.

For the first quarter of its FY 2010 (Q4 of calendar year 2009) the company expects sales and results to remain stable. For the entire year 2010, the company predicts an increase in sales of about 10 percent, driven in the first place by a recovery in its automotive segment. The Wireless Solutions and Industrial & Multimarket segments are expected to grow somewhat slower while the Chip Card & Security segment will contribute the smallest growth rates, despite a recently announced large contract with China on passport chips.

Wednesday, October 15, 2008

New Digital ASIC positions in MA!!

I have several brand new Digital ASIC roles with a client in MA. This is a solid, public company with a great reputation! Below are the detailed descriptions, please feel free to forward your resume directly to me at ross@hightechnh.com

Location: Westford, MA

Summary

The Westford office seeks an experienced (BS +10, MS +8 years) Networking Architect (System/ASIC) to work on the next generation of high speed networking products. Experience with networking related designs and specific experience with QOS, queuing, and scheduling is required.

Responsibilities

Responsibilities include system architecture, ASIC definition, micro-architecture, and project leadership. This position will require a modest amount of travel to Sunnyvale to interact and collaborate with other corporate architects. Additional responsibilities include Verilog RTL coding and synthesis, working closely with Design and Verification engineers to ensure design quality and involvement with PD engineers to ensure solid implementation and timing closure.

Will be a primary member of a team responsible for executing project deliverables and processes necessary to successfully specify, develop, and release to production highly integrated ASICs.

Primary interfaces include architecture, marketing, design, verification, product & test engineering, and other hardware and software development groups. Must have previous experience in organizations with custom / semi-custom CMOS ASIC designs. Experience required in RTL coding, verification, gate level simulation, and associated tools. Experience in physical design (place and route, static timing analysis, package selection and design for test) is a plus.



Job Requirements

Qualifications

We are looking for a positive, energetic candidate who would welcome the challenge of working for a leading edge, growing company. The position will involve close, consultative working relationships with engineers from other teams. An outgoing personality and a collaborative spirit is required.

Required skills include:

  • Design Experience

System and ASIC architecture for networking products
Knowledge of ASIC development tools, physical design tools, and
programming languages, QOS, packet queuing, and scheduling experience


Other desirable skills

SystemC, Vera, or equivalent
C/C++
Scripting with Perl and/or TCL
Large ASIC floorplanning and timing closure
Exceptional written & verbal communication skills

The Silicon Development group develops high-speed, multi-million gate ASICs for routers, firewalls, and other networking products. To deliver on-time and error-free, high performing, scalable, lowest cost, power efficient SILICON that is widely-deployable and beats the competition.

Location: Westford, MA

Summary

The Westford office seeks an experienced (BS +6, MS +4 years) ASIC design engineer on the next generation of high speed networking products. Experience with networking related designs is preferred.

The engineer in this position will be responsible for designing and verifying sections within our multi-million+ gate next-generation SOCs. These high performance designs will be part of the next generation of high performance network infrastructure systems.

Responsibilities

Responsibilities include Verilog RTL coding and synthesis, working closely with other design and verification engineers to ensure design quality and with PD engineers to ensure routable implementation and timing closure.

Candidate will be part of a team responsible for executing project deliverables and processes necessary to successfully specify, develop, and release to production highly integrated ASICs.

Primary interfaces include architecture, design, verification, product & test engineering, and other hardware and software development groups. Must have previous experience in organizations with custom / semi-custom CMOS ASIC designs. Experience required in RTL coding, formal verification, gate level simulation, debug and associated tasks. Experience in physical design (place and route, static timing analysis, package selection and design for test) is a plus.

Additional responsibilities
RTL development from concept to production
Participate in review of design implementation for optimal design tradeoffs and
coding styles
Ensure completed assignments meet project deadlines and departmental and
corporate goals
Participate in methodology improvement

Requirements
Qualifications

We are looking for positive, energetic candidates who would welcome the challenge of working for a leading edge, growing company. The position will involve close, consultative working relationships with engineers from other teams. An outgoing personality and a collaborative spirit is required.

Required skills include
Bachelor's degree in Electrical Engineering or a related field
Knowledge of ASIC development tools, physical design tools, and
programming languages
Verilog, Synopsys
Ability to speak, listen and write effectively
Ability to work well with others, across geographical boundaries

Other desirable skills
SystemC, or equivalent
C/C++
Scripting with Perl and/or TCL
Large ASIC floor-planning and timing closure

Location: Westford, MA


Summary


The Westford office seeks an experienced (BS +6, MS +4 years) ASIC design verification engineer on the next generation of high speed networking products. Experience with networking related designs is preferred.

The engineer in this position will be responsible for verifying sections within our multi-million+ gate next-generation SOCs. These high performance designs will be part of the next generation of high performance network infrastructure systems.

Responsibilities

Responsibilities include writing test plans, building verification test benches, and writing / executing / debugging tests and working closely with system architects and design engineers to ensure design quality.

Candidate will be part of a team responsible for executing project deliverables and processes necessary to successfully specify, develop, and release to production highly integrated ASICs.

Primary interfaces include architecture, design, verification, product & test engineering, and other hardware and software development groups. Must have previous experience in organizations with custom / semi-custom CMOS ASIC designs. Experience required in RTL coding, verification, gate level simulation, and associated tools. Experience in physical design (place and route, static timing analysis, package selection and design for test) is a plus.

Additional responsibilities
Responsible for design verification from concept to production
Develop detailed and comprehensive test plans
Develop verification infrastructure
Timely execution of test plans
Participate in review of design verification coding and coverage metrics
Ensure completed assignments meet project deadlines and departmental and corporate goals
Participate in methodology improvements
Requirements
We are looking for positive, energetic candidates who would welcome the challenge of working for a leading edge, growing company. The position will involve close, consultative working relationships with engineers from other teams. An outgoing personality and a collaborative spirit is required.

Required skills include
Bachelor's degree in Electrical Engineering or a related field
Knowledge of ASIC verification tools, scripting and programming languages
Must be fluent in Verilog, C, and C++
SystemC knowledge is a plus
Ability to speak, listen and write effectively
Ability to work well with others, across geographical boundaries

Any interested parties, please forward your resume to me directly at ross@hightechnh.com

Tuesday, October 7, 2008

Lack of posts, inactivity!

I follow the traffic to this blog Religiously. I thank all of those people or "returning visitors" for continuing to visit this site. You may have noticed that as of late my posts have declined in frequency, content and quality. Here's the deal.... I recently registered a new domain, www.themadrecruiter.com and have been diligently working on getting this site up and running, but I want to get it right. It's going to take some time because I am incorporating flash, streaming video, industry specific discussions and live chat, as well as the ability to post "video resumes!" I ask that you please be patient but at the same time know that I am still "recruiting" full time and have many great opportunities.
I understand that the markets are crashing, cash is tight, investors have lost over 3 TRILLION dollars in the last year! However, the fact of the matter is that companies are still hiring!! I have numerous positions for verification engineers, product engineers, applications engineers, test engineers, etc!! Problem is that none of these roles are for new college grads. I need people with 5+ years experience specifically in the semiconductor/photonics industry..
I will continue to do my best to keep you all up to date with recent job orders and the latest "inside" news that you may not get anywhere else. But let me assure you that when my new website is up and running, it will be the most comprehensive, cutting edge, innovative and "outside the box" website you have seen! It's going to take some time, so please bear with me..

If you would like notification when this new site is active, please e-mail me with your contact info at ross@hightechnh.com or leave me a comment with your e-mail below..

Tuesday, March 4, 2008

The "in person interview." A continuation of the "phone interview."

The Interview

You have two main goals in the interview situation:

  1. Demonstrate to the employer that you can make a positive contribution to their organization (taking into consideration their investments in your salary and your training time),
  2. Demonstrate to the employer that you will be a compatible member of their team. Bear in mind that both you and the employer are selling and evaluating each other.

Listed below are general guidelines for interview conduct:

  1. Plan to arrive a few minutes early - late arrival for a job interview is never excusable.
  2. If presented with an application, fill it out neatly and completely even if you have brought your personal resume. Unwillingness to fill out the application, or writing in of "see resume" may disqualify you from some positions immediately.
  3. Shake hands firmly and greet the interviewer with his or her surname - if not sure of the pronunciation, please ask the interviewer to repeat their name.
  4. It is your responsibility to establish an immediate level of rapport so that you may communicate comfortably.
  5. Direct the interviewer to detail the duties of the position early in the interview so that you can relate your background and skills to their needs.
  6. Make sure that your positive traits are communicated to the interviewer in a factual and sincere manner.
  7. Emphasize your strong points and minimize your liabilities.
  8. Respond to each question in a thoughtful, truthful, concise and complete manner.
  9. Be aware of your posture and body language - they communicate attitudes and impressions.
  10. Never close the door on opportunity - always conduct yourself as if you were determined to get the position you are discussing.
  11. Manage the interview, do not take charge but establish equal status; not subordinate, not dominant.
  12. Keep a list of all the people you talk with, their titles and the correct spelling of their names. You will need these to write thank you letters after the interview.
Coming up next I will cover "Interview questions to expect." Stay Tuned!

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