Monday, April 22, 2013

Physical Design/Implementation Engineer





 Physical Design/Implementation Engineer
Company Description
Very exciting and fast growing start- up company currently in stealth mode, developing interesting SoCs & platforms & working on the latest technology edge, in a close collaboration with various partners and customers. Company is well funded and has solid financial backing from large corporate, strategic and financial investors. Founded by an experienced team with many industry notables involved in various capacities. 

Job Description
Looking for experienced Physical Design implementation (RTL-GDSII) Engineers to lead back-end effort on complex high performance/low power SoCs.

Requirements
* Hands on experience with various implementation types – Megablock, Datapath,
   Control and Arrays
* Familiarity with advanced low power (leakage & dynamic) reduction techniques
* Experience with Synthesis and APR on small to large mega blocks
* Multiple tape outs on advanced CMOS nodes with direct RTL to GDSII
    Implementation experience
* Familiarity with various industry standard EDA tools
* Design/project management skills and ability to lead/mentor junior Engineers
* Experience with chip area/power/freq estimates based on insufficient data
* Ability to complete timing, power and reliability closure for various functional blocks

Send resume in confidence to themadrecruiter@gmail.com 

Wednesday, April 10, 2013

Microprocessor Verification Engineer(s) Santa Clara, CA






Job Description
Will be one of the leading members of a large Microprocessor Verification (DV) team. Responsible for pre-silicon RTL verification of a complex low power, high performance design that includes digital and analog cores. Some of the responsibilities include but not limited to testbench/testplans development, block level verification, full-chip verification, coverage driven verification, system & architectural compatibility verification and assertions driven verification.  You will also be responsible for mentoring and training junior Engineers.

Requirements
            
    * 5-10 years of industrial experience in pre-silicon verification
* Hands on experience with System Verilog, NTB/VERA, SPECMAN, C/C++ and Perl* Must be familiar with one or more of, SPARC, X86, MIPS, ARM and PowerPC 
* Processor verification background is desired 
* Assembly language test writing/debug is a plus, as is familiarity with UVM/OVM

Please send resume to themadrecruiter@gmail.com